Four identically designed control channels, comprising sensors, an evaluation circuit and a brake control unit, for the various wheel brakes are provided as well as safety circuits and devices for testing the operability of the anti-block control system at timed intervals in a test cycle. An identical test signal is fed from the test device into all the channels, and the effects of these test signals are compared by the safety circuit and the test device at predetermined, corresponding locations in the channels, specifically in pairs, with respect to an at least approximate agreement in terms of the time of occurrence and/or the value of the occurring signal; a switching and/or warning signal is generated whenever the compared signals deviate from one another by a predetermined value, which may also be zero.
In German Patent Disclosure Document DE-OS No. 26 14 016, to which U.S. Pat. No. 4,085,979 corresponds, a two-channel anti-block controller is described in which a test signal is fed into the channels from time to time, particularly at a standstill, and the resultant signals are compared at different, corresponding positions in the channels. As disclosed, the safety circuit thus includes timing elements and comparison elements. If the signals do not agree, a warning and/or switching signal is generated. A safety circuit containing timing elements is also provided for both channels, and it can be monitored separately; the time constants of the timing elements are shortened as needed.
With respect to a two-channel anti-block controller, it is also known, from German Examined Application DE-AS No. 27 01 159, to which British Pat. No. 1,596,191 corresponds, to dispense with a safety circuit having timing elements, and to feed a test signal into the channels at predetermined intervals even while driving. Two test circuits are provided, in which the signals resulting at various positions of the two channels are compared; if they do not agree, the warning and/or switching signal is generated. As a result, a defect is recognized even if one test circuit should fail.